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Nvidia Reveals Offering To Build Semi-Custom AI Systems With Hyperscalers

CRN by CRN
May 19, 2025
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Nvidia reveals the NVLink Fusion offering that it says will allow the company to build semi-custom AI infrastructure with hyperscalers that are designing custom chips. ‘This gives customers more choice and flexibility, while expanding the ecosystem and creating new opportunities for innovation with Nvidia at the center,’ an Nvidia executive says.

As hyperscalers like Amazon and Microsoft continue to diversify their supply chains by building custom AI chips, Nvidia is revealing a new silicon offering that it hopes will keep the company “at the center” of AI infrastructure for such customers.

At Computex 2025 in Taiwan Monday, Nvidia unveiled NVLink Fusion, a silicon offering that it said will allow the company to use its NVLink interconnect technology to build semi-custom, rack-scale AI infrastructure with hyperscalers.

[Related: How Dell, Lenovo And Supermicro Are Adapting To Nvidia’s Fast AI Chip Transitions]

The Santa Clara, Calif.-based company said several semiconductor firms, including MediaTek and Marvell, will adopt NVLink Fusion to create custom AI silicon that will be paired with the AI infrastructure giant’s Arm-based Grace CPUs. Other companies planning to do this include Astera Labs, AIchip Technologies, Synopsys and Cadence.

Design services from these companies are available now, according to Nvidia.

Nvidia said it is also working with Fujitsu and Qualcomm, whose CPUs can be integrated with its GPUs using NVLink Fusion to “build high-performance Nvidia AI factories.”

“A tectonic shift is underway: For the first time in decades, data centers must be fundamentally rearchitected—AI is being fused into every computing platform,” said Nvidia founder and CEO Jensen Huang (pictured above) in a statement. “NVLink Fusion opens Nvidia’s AI platform and rich ecosystem for partners to build specialized AI infrastructure.”

In a briefing, Dion Harris, senior director of high-performance computing and AI factory solutions go-to-market at Nvidia, said NVLink Fusion is the company’s standard NVLink chip-to-chip interconnect technology made available for non-NVLink processors.

“The reason why that’s really important is when you think about the large hyperscale data centers that are being built today based on a lot of our scale-up architecture, this now allows them to go and standardize across their entire compute fleet on the Nvidia platform,” he said.

Nvidia uses NVLink in platforms like the GB200 NVL72 to provide high-speed connections between GPUs and CPUs. The company said the latest iteration provides a total bandwidth of 1.8 TBps per GPU, which is 14 times faster than PCIe Gen 5.

In response to a question from CRN, Harris said Nvidia isn’t announcing any customer engagements right now but teased that it will have “more updates in the near future.”

“This gives customers more choice and flexibility, while expanding the ecosystem and creating new opportunities for innovation with Nvidia at the center,” he said.

How NVLink Fusion Works

In the briefing, Nvidia showed diagrams of how NVLink Fusion can be used in two different rack-scale system configurations that resemble the company’s GB300 NVL72 platform and future iterations. One configuration pairs Nvidia GPUs with a custom CPU while the other pairs Nvidia CPUs with a custom accelerator chip.

Harris said these are the only two configurations the company is talking about for now and called them “a starting point.”

The implementation of NVLink Fusion is different depending on whether a customer wants to use a custom CPU or a custom accelerator chip, according to Harris.

For the custom CPU configuration, the CPU is connected to Nvidia’s GPUs via the NVLink chip-to-chip interconnect in a rack-scale platform.

But for custom accelerator chips, Nvidia has developed an I/O chiplet that customers can integrate into their chip designs. Harris said the I/O chiplet has been “taped out,” referring to the final stage of the design process before it is manufactured.

This I/O chiplet will let the accelerator chip interface with the NVLink switch, which enables “access to the custom, scale-up NVLink architecture,” and the NVLink chip-to-chip interconnect, which enables communication with Nvidia’s Grace CPU, according to Harris.

These NVLink Fusion-based systems take advantage of Nvidia’s end-to-end networking platform, which includes the company’s ConnectX-8 SuperNICs as well as the Spectrum-X Ethernet and Quantum-X InfiniBand switches.

“This gives them a proven scale-up and scale-out solution that they can deploy and basically accelerate their time-to-market for having that rack-scale solution for their custom compute,” Harris said.



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Tags: Accelerator ChipsAICPUsGenerative AI
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